在一个内容广泛的讨论中，Playground Global的普通合伙人、英特尔和威睿（VMware）的前领导人帕特·基辛格（Pat Gelsinger）分享了他对人工智能数字时代技术发展态势的见解，强调了新的瓶颈和充满创新潜力的领域。 基辛格开篇强调，在AI时代，“能源容量等于经济容量”，并预测“许多数据中心项目将因为缺乏能源而出现越来越多的违约事件。”他指出，国家能源容量已停滞不前或增长微乎其微，这给AI的扩张带来了巨大的阻力。他倡导使用更多核能等基载能源，并强调了电力传输方面的创新，例如800伏直流数据中心和垂直氮化镓（GAN）技术，旨在实现单步电源转换以提高效率。物理学上的根本性变革，例如超导，也即将到来，以克服CMOS功耗效率的平台期。 回忆起他的早期职业生涯，基辛格讲述了他在英特尔的历程，为286、386和486处理器做出了贡献。他解释了486项目如何通过发明英特尔的硬件描述语言（HDL）并与伯克利（Berkeley）合作开发布局、布线和时序管理工具，从而“创造了EDA”（电子设计自动化）。他将其与当今的情况进行类比，认为人工智能现在正开始彻底改变芯片设计，例如Jalapeno项目就是利用人工智能进行初始设计原则的典范。 然而，当技术使设计变得更容易时，新的瓶颈也随之出现。尽管人工智能可以在三个月内实现“卓越设计”，但基辛格指出，随之而来的是“九个月的芯片处理时间”，其中包括先进封装和集成到“机架级解决方案”，因为“一切都不再是芯片。它是一个机架。”他强调需要将这段时间压缩到“一两个月”，以跟上快速演进的AI工作负载。 一个关键瓶颈是内存。基辛格坦率地将高带宽存储器（HBM）描述为“一种糟糕的内存……但它是我们目前拥有的最好的。”他感叹过去30年缺乏“重大的新型存储器”，指出行业一直停留在DRAM、SRAM和闪存。然而，鉴于人工智能是一种“内存计算工作负载”，且大量资金涌入内存领域，他宣称“30年来首次，内存创新即将来临。”这包括堆叠存储解决方案、铁电材料等新材料，以及致力于将计算和内存更紧密地结合在一起的公司。他对内存计算（PIM）方法表示怀疑，认为它们会限制工作负载。关于堆叠，他预见到“漂亮的三、四、五层堆叠”是一个最佳点，而不是高密度的16或32层堆叠，原因是制造良率挑战。 基辛格认为，AI推理加速芯片的激增，以及“100家相互竞争的处理器供应商”，是一种暂时现象。他预测将出现融合，原因有三：随着AI工作负载的快速演进，极端计算异构性不可持续；资本市场驱动的自然整合，只有少数公司能达到必要的规模；以及“赢家将选择一些赢家”，这意味着主要的AI参与者将投资于特定的软硬件协同演进平台。他认为极端专业化是存在问题的，因为“工作负载将持续调整并发生显著迁移。” 基辛格重申了他25年前关于“铜的消亡”的预测，指出“所有I/O都应该转向光纤。”虽然核心计算-内存复合体不会是光学的，但他认为在2028-2029年期间，I/O将转向光学，这是由扩展大基数计算集群的需求和铜的当前限制所驱动的。这很可能将网络架构推向更可预测的、基于流的电路交换光网络（OCS），从而模糊了纵向扩展和横向扩展之间的界限。 最后，作为威睿（VMware）前首席执行官，基辛格谈到了在AI智能体背景下虚拟机（VM）的复兴。他认为VM抽象是基础性的，并将为“智能体”时代重新创建。关注点将从服务硬件和人类转向“服务智能体”，这将需要安全、性能、抽象和迁移方面的新实现形式——本质上就是“针对智能体的V-motion”。挑战在于如何让人类为这些以智能体为中心的虚拟环境设定策略和防护措施。

In a wide-ranging discussion, Pat Gelsinger, General Partner at Playground Global and former leader at Intel and VMware, shared his insights on the evolving landscape of technology in the AI digital age, highlighting new bottlenecks and areas ripe for innovation. Gelsinger opened by emphasizing that "energy capacity equals economic capacity" in the AI era, predicting "more and more defaults happening on many of those data center projects because the energy won't be there." He noted the national energy capacity has flatlined or grown minimally, creating a significant headwind for AI expansion. He advocated for more baseload energy like nuclear and highlighted innovations in power delivery, such as 800-volt DC data centers and vertical GAN technology, aiming for single-step power conversion to improve efficiency. Fundamental changes to physics, like superconducting, are also on the horizon to overcome the plateauing power efficiency of CMOS. Reflecting on his early career, Gelsinger recounted his journey at Intel, contributing to the 286, 386, and 486 processors. He explained how the 486 project essentially "created EDA" (Electronic Design Automation) by inventing Intel's Hardware Description Language (HDL) and collaborating with Berkeley to develop placement, routing, and timing management tools. He draws a parallel to today, suggesting that AI is now beginning to revolutionize chip design, exemplified by projects like Jalapeno, which uses AI for initial design principles. However, new bottlenecks emerge when technology makes design easier. While AI can enable "awesome design" in three months, Gelsinger points out the subsequent "nine months of silicon processing time," including advanced packaging and integration into "rack-scale solutions" because "nothing's a chip anymore. It's a rack." He stressed the need to compress this time to "a month or two" to keep pace with rapidly evolving AI workloads. A critical bottleneck is memory. Gelsinger candidly described High Bandwidth Memory (HBM) as a "hideous memory...it's just the best one that we've got." He lamented the lack of "major new memories" over the last 30 years, noting the industry has been stuck with DRAM, SRAM, and Flash. However, with AI being a "memory compute workload" and significant capital pouring into the memory sector, he declared that "memory innovation for the first time in 30 years is nigh upon us." This includes stacked memory solutions, new materials like ferroelectrics, and companies focused on bringing compute and memory closer together. He expressed skepticism about Processing-in-Memory (PIM) approaches, believing they constrain workloads. Regarding stacking, he foresees "nice three, four, five stacks" as a sweet spot rather than highly dense 16 or 32-layer stacks, due to manufacturing yield challenges. The proliferation of AI inference accelerator chips, with "100 competing processor vendors," is a temporary phenomenon in Gelsinger's view. He predicted a convergence due to three reasons: the unsustainability of extreme compute heterogeneity as AI workloads evolve rapidly; the natural consolidation driven by capital markets, where only a few will achieve the necessary scale; and "winners will pick some winners," implying that major AI players will invest in specific hardware-software co-evolved platforms. He argued that extreme specialization is problematic because "the workloads are going to continue to moderate, and migrate so significantly." Gelsinger reaffirmed his 25-year-old prediction of "the death of copper," stating that "all I.O. should go to optical." While the core compute-memory complex won't be optical, he sees a shift to optical for I/O in the 2028-2029 timeframe, driven by the need to scale large radix compute clusters and current limitations of copper. This will likely push network architectures towards more predictable, flow-based, circuit-switched optical networks (OCS), blurring the lines between scale-up and scale-out. Finally, as the former CEO of VMware, Gelsinger addressed the resurgence of virtual machines (VMs) in the context of AI agents. He believes the VM abstraction is foundational and will be recreated for the "agent" era. The focus will shift from servicing hardware and humans to "servicing agents," requiring new embodiments for security, performance, abstraction, and migration – essentially, "V-motion for agents." The challenge lies in enabling humans to set policies and guardrails for these agent-centric virtual environments.